The call for papers is now open for DHPCC++19 and closes on 27th January.
by the DHPCC++
From the article:
This will be the 3rd DHPCC++ event in partnership with IWOCL, the international OpenCL workshop with a focus on heterogeneous programming models for C and C++, covering all the programming models that have been designed to support heterogeneous programming in C and C++.
Many C++ programming models exist including SYCL, HPX, KoKKos, Raja, C++AMP, HCC, Boost.Compute, and CUDA. This conference aims to address the needs of both HPC and the consumer/embedded community where a number of C++ parallel programming frameworks have been developed to address the needs of multi-threaded and distributed applications. The C++11/14/17 International Standards have introduced new tools for parallel programming to the language, and the ongoing standardization effort is developing additional features which will enable support for heterogeneous and distributed parallelism into ISO C++ 20/23. This conference is an ideal place to discuss research in this domain, consolidate usage experience, and share new directions to support new hardware and memory models with the aim of passing that experience to ISO C and C++.
Topics of interest include, but are not limited to:
- Future Heterogeneous programming C/C++ proposals (SYCL, Kokkos, Raja, HPX, C++AMP, Boost.Compute, CUDA …)
- ISO C/C++ related proposals and development including current related concurrency, parallelism, coroutines, executors
- C/C++ programming models for OpenCL
- Language Design Topics such as parallelism model, data model, data movement, memory layout, target platforms, static and dynamic compilation
- Applications implemented using these models including Neural Network, machine vision, HPC, CFD as well as exascale applications
- C/C++ Libraries using these models
- Integration of these models with other programming models
- Compilation techniques to optimize kernels using any of (clang, gcc, ..) or other compilation systems
- Performance or functional comparisons between any of these programming models
- Implementation of these models on novel architectures (FPGA, DSP, …) such as clusters, NUMA and PGAS
- Using these models in fault-tolerant systems